Modern computing buses can have multiple lanes between the transmitter and a receiver. The transmitter and receiver may have different internal clocks. By using signal-matching techniques such as delay lines, shift registers, or phase-rotators, a transmission sent over a series of lanes from a transmitter may be configured to sync up and/or with the clock of a receiver. The lanes of a bus may be used to send one or more bytes in a single transmission by sending numerous bits of a byte in parallel.